Copper was introduced in chip production in the early 2000’s to replace aluminum. Now copper is facing replacement as making wires or pillars on the nm scale as reaching its limit in electrical conduction and heat dissipation. For carbon nanotubes, remote plasma chemical vapor deposition is used with the CMOS chip manufacturing technique to grow CNT bundles in vertical contact holes of 150 nm diameter on 200 mm silicon wafers that connect to copper contacts. An insulator is used to fill the gaps between the CNT bundles as well as to fix the CNTs so that their ends are trimmed to be level with the surface.
At room temperature, graphene transistors may be used, but require a working size of a few tens of atoms in width. These transistors will need atomically precise electrical contacts. To do so, voltage pulses from the tip of the STM can remove a single hydrogen atom that initiates single bond formation.